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To increase the timing margin, it is advised to use an FCCC in the CLK data path to shift the clock backward, as
shown in Figure 9-3 .
Figure 9-3 · Clocking in SmartFusion2 with CCC
Using an FCCC, the clock can be shifted forward or backward. In this particular case, the clock should be shifted
backwards, which will afford a large margin on clk-out path to the user. In the Libero SoC software, this is achieved
using the programmable delay element in the FCCC output. Figure 9-4 shows how to configure the FCCC with a
negative delay.
Note: The feedback must be set to CCC Internal. Otherwise, the reference clock and the output clock GL0 will
remain in phase.
Figure 9-4 · FCCC Configuration in SmartFusion2
You must simply use the FCCC output to drive the CorePCIF design at the top-level, and any other logic in the
FPGA required as well (unless the CLK_OUT as described above is used).
128
v4.0
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相关代理商/技术参数
COREPCIF-RMFL 功能描述:IP MODULE 制造商:microsemi corporation 系列:- 零件状态:在售 类型:许可证 应用:- 版本:- 许可长度:- 许可 - 用户明细:- 操作系统:- 配套使用产品/相关产品:Microsemi 器件 媒体分发类型:- 标准包装:1
COREPCIF-UR 功能描述:HW/SW/OTHER 制造商:microsemi corporation 系列:* 零件状态:在售 标准包装:1
COREPCI-SN 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:CorePCI v5.41
COREPCI-SR 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:CorePCI v5.41
COREPCI-UR 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:CorePCI v5.41
COREPCI-XX 制造商:ACTEL 制造商全称:Actel Corporation 功能描述:CorePCI v5.41
COREPRO LEDBULB 10.5-60W B 制造商:Philips Lumileds 功能描述:
COREPRO LEDBULB 10.5-60W E 制造商:Philips Lumileds 功能描述: